“111”引智平台“高等并行计算机系统结构”系列讲座预告
报告题目：Does Hardware Design have to be Hard?
报告人：James Hoe, Professor, IEEE Fellow, Carnegie Mellon University, USA
报告时间：9月22-26日9:00-12:00
报告地点：新主楼F座327
内容简介：
Does Hardware Design have to be Hard?
VLSI technology trend dictates that continued performance scaling in computation must be accompanied by expending less energy per operation. Mapping computations directly onto hardware—avoiding the execution overhead of software—is the most direct way to achieve the needed energy/power reduction for the most performance demanding applications. The increasingly capable FPGA co-processing options emerging in the last few years have reduced the barrier-to-entry from a platform perspective. Still, a major obstacle to a more widespread use of hardware acceleration remains in the high degree of difficulty in mapping applications to hardware.
This short course addresses the question, does hardware design have to be hard, especially in the context of mapping computation to hardware for acceleration. The scope of the course is based on the research experience and perspectives of the instructor. This course does not assume a background in digital logic and hardware design and will provide an overview of the essential background concepts. The major topics to be discussed in this short course are
• Operation-Centric Hardware Design and Synthesis (Bluespec)
• C-to-Hardware Design and Synthesis
• Domain-Specialized High-level Synthesis (Spiral)
• “Smart” IP-Based Design (Pandora)
• Infrastructure and Virtualization (CoRAM)
• Performance, Power and Energy of Hardware Acceleration
There will be approximately 2 hours of slide-based presentation and 1 hour of open discussion per day for this 5-day short course.
课程相关资料：
http://users.ece.cmu.edu/~jhoe/doku/doku.php?id=bhsc14
教授简介：
James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University. He received his Ph.D. in EECS from Massachusetts Institute of Technology in 2000 (S.M., 1994). He received his B.S. in EECS from UC Berkeley in 1992. He is interested in many aspects of computer architecture and digital hardware design, including the specific areas of FPGA architecture for computing; digital signal processing hardware; and high-level hardware design and synthesis. He co-directs the Computer Architecture Lab at Carnegie Mellon (CALCM) and is affiliated with the Center for Silicon System Implementation (CSSI). He is a Fellow of IEEE. For more information, please visit http://www.ece.cmu.edu/~jhoe.
James Hoe是美国卡耐基梅隆大学电子与计算机工程系教授。他1992年在伯克利获得电子工程与计算机科学专业硕士学位，2000年在麻省理工学院获得电子工程与计算机科学专业博士学位。他的的主要研究方向是计算机系统结构和数字硬件设计，包括用于特定领域计算的FPGA体系结构、数字信号处理硬件以及高层硬件设计和综合等。他是卡耐基梅隆大学计算机系统结构实验室主任，IEEE Fellow。 更多信息请查阅http://www.ece.cmu.edu/~jhoe.
编辑：贾爱平
